? semiconductor components industries, llc, 2003 march, 2003 - rev. 0 1 publication order number: NST3904DXV6T1/d NST3904DXV6T1, nst3904dxv6t5 dual general purpose transistor the NST3904DXV6T1 device is a spin- off of our popular sot-23/sot-323 three-leaded device. it is designed for general purpose amplifier applications and is housed in the sot- 563 six-leaded surface mount package. by putting two discrete devices in one package, this device is ideal for low-power surface mount applications where board space is at a premium. ? h fe , 100-300 ? low v ce(sat) , 0.4 v ? simplifies circuit design ? reduces board space ? reduces component count ? lead-free solder plating maximum ratings rating symbol value unit collector - emitter voltage v ceo 40 vdc collector - base voltage v cbo 60 vdc emitter - base voltage v ebo 6.0 vdc collector current - continuous i c 200 madc electrostatic discharge esd hbm>16000, mm>2000 v thermal characteristics characteristic (one junction heated) symbol max unit total device dissipation t a = 25 c derate above 25 c p d 357 (note 1) 2.9 (note 1) mw mw/ c thermal resistance junction-to-ambient r ja 350 (note 1) c/w characteristic (both junctions heated) symbol max unit total device dissipation t a = 25 c derate above 25 c p d 500 (note 1) 4.0 (note 1) mw mw/ c thermal resistance junction-to-ambient r ja 250 (note 1) c/w junction and storage temperature range t j , t stg - 55 to +150 c 1. fr-4 @ minimum pad sot-563 case 463a plastic 1 2 3 6 5 4 q 1 (1) (2) (3) (4) (5) (6) q 2 nst3946dxv6t1 ordering information http://onsemi.com ma = specific device code d = date code marking diagram ma d device package shipping NST3904DXV6T1 sot-563 4 mm pitch 4000/tape & reel nst3904dxv6t5 sot-563 2 mm pitch 8000/tape & reel .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics collector - emitter breakdown voltage (note 2) (i c = 1.0 madc, i b = 0) v (br)ceo 40 - vdc collector - base breakdown voltage (i c = 10 adc, i e = 0) v (br)cbo 60 - vdc emitter - base breakdown voltage (i e = 10 adc, i c = 0) v (br)ebo 6.0 - vdc base cutoff current (v ce = 30 vdc, v eb = 3.0 vdc) i bl - 50 nadc collector cutoff current (v ce = 30 vdc, v eb = 3.0 vdc) i cex - 50 nadc on characteristics (note 2) dc current gain (i c = 0.1 madc, v ce = 1.0 vdc) (i c = 1.0 madc, v ce = 1.0 vdc) (i c = 10 madc, v ce = 1.0 vdc) (i c = 50 madc, v ce = 1.0 vdc) (i c = 100 madc, v ce = 1.0 vdc) h fe 40 70 100 60 30 - - 300 - - - collector - emitter saturation voltage (i c = 10 madc, i b = 1.0 madc) (i c = 50 madc, i b = 5.0 madc) v ce(sat) - - 0.2 0.3 vdc base - emitter saturation voltage (i c = 10 madc, i b = 1.0 madc) (i c = 50 madc, i b = 5.0 madc) v be(sat) 0.65 - 0.85 0.95 vdc small- signal characteristics current - gain - bandwidth product (i c = 10 madc, v ce = 20 vdc, f = 100 mhz) f t 300 - mhz output capacitance (v cb = 5.0 vdc, i e = 0, f = 1.0 mhz) c obo - 4.0 pf input capacitance (v eb = 0.5 vdc, i c = 0, f = 1.0 mhz) c ibo - 8.0 pf 2. pulse test: pulse width 300 m s; duty cycle 2.0%. .com .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 3 electrical characteristics (t a = 25 c unless otherwise noted) (continued) characteristic symbol min max unit input impedance (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) h ie 1.0 2.0 10 12 k w voltage feedback ratio (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) h re 0.5 0.1 8.0 10 x 10 -4 small - signal current gain (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) h fe 100 100 400 400 - output admittance (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) h oe 1.0 3.0 40 60 mhos noise figure (v ce = 5.0 vdc, i c = 100 adc, r s = 1.0 k w , f = 1.0 khz) nf - - 5.0 4.0 db switching characteristics delay time (v cc = 3.0 vdc, v be = - 0.5 vdc) t d - 35 ns rise time (i c = 10 madc, i b1 = 1.0 madc) t r - 35 ns storage time (v cc = 3.0 vdc, i c = 10 madc) t s - 200 ns fall time (i b1 = i b2 = 1.0 madc) t f - 50 ns figure 1. delay and rise time equivalent test circuit figure 2. storage and fall time equivalent test circuit +3 v 275 10 k 1n916 c s < 4 pf* +3 v 275 10 k c s < 4 pf* < 1 ns -0.5 v +10.9 v 300 ns duty cycle = 2% < 1 ns -9.1 v +10.9 v duty cycle = 2% t 1 0 10 < t 1 < 500 s * total shunt capacitance of test jig and connectors .com .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 4 typical transient characteristics figure 3. capacitance reverse bias voltage (volts) 2.0 3.0 5.0 7.0 10 1.0 0.1 capacitance (pf) 1.0 2.0 3.0 5.0 7.0 10 20 30 40 0.2 0.3 0.5 0.7 c ibo c obo t j = 25 c t j = 125 c figure 4. turn - on time i c , collector current (ma) 70 100 200 300 500 50 figure 5. rise time i c , collector current (ma) time (ns) 1.0 2.0 3.0 10 20 70 5 100 t , rise time (ns) figure 6. storage time i c , collector current (ma) figure 7. fall time i c , collector current (ma) 5.0 7.0 30 50 200 10 30 7 20 70 100 200 300 500 50 1.0 2.0 3.0 10 20 70 5 100 5.0 7.0 30 50 200 10 30 7 20 70 100 200 300 500 50 1.0 2.0 3.0 10 20 70 5 100 5.0 7.0 30 50 200 10 30 7 20 70 100 200 300 500 50 1.0 2.0 3.0 10 20 70 5 100 5.0 7.0 30 50 200 10 30 7 20 r t , fall time (ns) f t , storage time (ns) s v cc = 40 v i c /i b = 10 v cc = 40 v i b1 = i b2 i c /i b = 20 i c /i b = 10 i c /i b = 10 t r @ v cc = 3.0 v t d @ v ob = 0 v 40 v 15 v 2.0 v i c /i b = 10 i c /i b = 20 i c /i b = 10 i c /i b = 20 t s = t s - 1 / 8 t f i b1 = i b2 .com .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 5 typical audio small- signal characteristics noise figure variations (v ce = 5.0 vdc, t a = 25 c, bandwidth = 1.0 hz) figure 8. noise figure f, frequency (khz) 4 6 8 10 12 2 0.1 figure 9. noise figure r s , source resistance (k ohms) 0 nf, noise figure (db) 1.0 2.0 4.0 10 20 40 0.2 0.4 0 100 4 6 8 10 12 2 14 0.1 1.0 2.0 4.0 10 20 40 0.2 0.4 100 nf, noise figure (db) f = 1.0 khz i c = 1.0 ma i c = 0.5 ma i c = 50 a i c = 100 a source resistance = 200 i c = 1.0 ma source resistance = 200 i c = 0.5 ma source resistance = 500 i c = 100 a source resistance = 1.0 k i c = 50 a h parameters (v ce = 10 vdc, f = 1.0 khz, t a = 25 c) figure 10. current gain i c , collector current (ma) 70 100 200 300 50 figure 11. output admittance i c , collector current (ma) h , current gain h , output admittance ( mhos) figure 12. input impedance i c , collector current (ma) figure 13. voltage feedback ratio i c , collector current (ma) 30 100 50 5 10 20 2.0 3.0 5.0 7.0 10 1.0 0.1 0.2 1.0 2.0 5.0 0.5 10 0.3 0.5 3.0 0.7 2.0 5.0 10 20 1.0 0.2 0.5 oe h , voltage feedback ratio (x 10 ) re h , input impedance (k ohms) ie 0.1 0.2 1.0 2.0 5.0 10 0.3 0.5 3.0 0.1 0.2 1.0 2.0 5.0 10 0.3 0.5 3.0 2 1 0.1 0.2 1.0 2.0 5.0 10 0.3 0.5 3.0 fe -4 .com .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 6 typical static characteristics figure 14. dc current gain i c , collector current (ma) 0.3 0.5 0.7 1.0 2.0 0.2 0.1 h , dc current gain (normalized) 0.5 2.0 3.0 10 50 70 0.2 0.3 0.1 100 1.0 0.7 200 30 20 5.0 7.0 fe v ce = 1.0 v t j = +125 c +25 c -55 c figure 15. collector saturation region i b , base current (ma) 0.4 0.6 0.8 1.0 0.2 0.1 v , collector emitter voltage (volts) 0.5 2.0 3.0 10 0.2 0.3 0 1.0 0.7 5.0 7.0 ce i c = 1.0 ma t j = 25 c 0.07 0.05 0.03 0.02 0.01 10 ma 30 ma 100 ma figure 16. ono voltages i c , collector current (ma) 0.4 0.6 0.8 1.0 1.2 0.2 figure 17. temperature coefficients i c , collector current (ma) v, voltage (volts) 1.0 2.0 5.0 10 20 50 0 100 -0.5 0 0.5 1.0 0 60 80 120 140 160 180 20 40 100 coefficient (mv/ c) 200 -1.0 -1.5 -2.0 200 t j = 25 c v be(sat) @ i c /i b =10 v ce(sat) @ i c /i b =10 v be @ v ce =1.0 v +25 c to +125 c -55 c to +25 c +25 c to +125 c -55 c to +25 c vc for v ce(sat) vb for v be(sat) .com .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 7 1.35 the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 150 milliwatts. information for using the sot-563 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. sot-563 power dissipation p d = t j(max) - t a r q ja p d = 150 c - 25 c 833 c/w = 150 milliwatts the power dissipation of the sot-563 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipa- tion. power dissipation for a surface mount device is deter- mined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot-563 package, p d can be calculated as follows: the 833 c/w for the sot-563 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 150 milli- watts. there are other alternatives to achieving higher power dissipation from the sot-563 package. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. there- fore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause exces- sive thermal shock and stress which can result in damage to the device sot-563 1.0 0.3 0.45 0.5 0.5 dimensions in mm .com .com .com .com .com 4 .com u datasheet
NST3904DXV6T1, nst3904dxv6t5 http://onsemi.com 8 package dimensions sot-563, 6 lead case 463a-01 issue o g m 0.08 (0.003) x d 6 5 pl c j -x- -y- notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. dim a min max min max inches 1.50 1.70 0.059 0.067 millimeters b 1.10 1.30 0.043 0.051 c 0.50 0.60 0.020 0.024 d 0.17 0.27 0.007 0.011 g 0.50 bsc 0.020 bsc j 0.08 0.18 0.003 0.007 k s style 1: pin 1. emitter 1 2. base 1 3. collector 2 4. emitter 2 5. base 2 6. collector 1 a b y 12 3 4 5 s k style 2: pin 1. emitter 1 2. emitter2 3. base 2 4. collector 2 5. base 1 6. collector 1 0.004 0.012 0.059 0.067 0.10 0.30 1.50 1.70 6 style 3: pin 1. cathode 1 2. cathode 1 3. anode/anode 2 4. cathode 2 5. cathode 2 6. anode/anode 1 style 4: pin 1. collector 2. collector 3. base 4. emitter 5. collector 6. collector on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2-9-1 kamimeguro, meguro-ku, tokyo, japan 153-0051 phone : 81-3-5773-3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. NST3904DXV6T1/d thermal clad is a registered trademark of the bergquist company. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 800-282-9855 toll free usa/canada .com .com .com .com 4 .com u datasheet
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